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PD - 94356A
SMPS MOSFET
IRFR430A IRFU430A
HEXFET(R) Power MOSFET
Applications Switch Mode Power Supply (SMPS) l Uninterruptible Power Supply l High speed power switching
l
VDSS
500V
RDS(on) max
1.7
ID
5.0A
Benefits Low Gate Charge Qg results in Simple Drive Requirement l Improved Gate, Avalanche and dynamic dv/dt Ruggedness l Fully Characterized Capacitance and Avalanche Voltage and Current l Effective COSS specified (See AN 1001)
l
D-Pak IRFR430A
I-Pak IRFU430A
Absolute Maximum Ratings
Parameter
ID @ TC = 25C ID @ TC = 100C IDM PD @TC = 25C VGS dv/dt TJ TSTG Continuous Drain Current, VGS @ 10V Continuous Drain Current, VGS @ 10V Pulsed Drain Current Power Dissipation Linear Derating Factor Gate-to-Source Voltage Peak Diode Recovery dv/dt Operating Junction and Storage Temperature Range Soldering Temperature, for 10 seconds
Max.
5.0 3.2 20 110 0.91 30 3.0 -55 to + 150 300 (1.6mm from case )
Units
A W W/C V V/ns
Avalanche Characteristics
Parameter
EAS IAR EAR Single Pulse Avalanche Energy Avalanche Current Repetitive Avalanche Energy
Typ.
--- --- ---
Max.
130 5.0 11
Units
mJ A mJ
Thermal Resistance
Parameter
RJC RCS RJA Junction-to-Case Case-to-Sink, Flat, Greased Surface Junction-to-Ambient
Typ.
--- 0.50 ---
Max.
1.1 --- 62
Units
C/W
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1
02/26/002
IRFR430A/IRFU430A
Static @ TJ = 25C (unless otherwise specified)
Parameter Drain-to-Source Breakdown Voltage V(BR)DSS/TJ Breakdown Voltage Temp. Coefficient RDS(on) Static Drain-to-Source On-Resistance VGS(th) Gate Threshold Voltage V(BR)DSS IDSS IGSS Drain-to-Source Leakage Current Gate-to-Source Forward Leakage Gate-to-Source Reverse Leakage Min. 500 --- --- 2.0 --- --- --- --- Typ. --- 0.60 --- --- --- --- --- --- Max. Units Conditions --- V VGS = 0V, ID = 250A --- V/C Reference to 25C, ID = 1mA 1.7 VGS = 10V, ID = 3.0A 4.5 V VDS = VGS, ID = 250A 25 VDS = 500V, VGS = 0V A 250 VDS = 400V, VGS = 0V, TJ = 125C 100 VGS = 30V nA -100 VGS = -30V
Dynamic @ TJ = 25C (unless otherwise specified)
gfs Qg Qgs Qgd td(on) tr td(off) tf Ciss Coss Crss Coss Coss Coss eff. Parameter Forward Transconductance Total Gate Charge Gate-to-Source Charge Gate-to-Drain ("Miller") Charge Turn-On Delay Time Rise Time Turn-Off Delay Time Fall Time Input Capacitance Output Capacitance Reverse Transfer Capacitance Output Capacitance Output Capacitance Effective Output Capacitance Min. 2.3 --- --- --- --- --- --- --- --- --- --- --- --- --- Typ. --- --- --- --- 8.7 27 17 16 490 75 4.5 750 25 51 Max. Units Conditions --- S VDS = 50V, ID = 3.0A 24 ID = 5.0A 6.5 nC VDS = 400V 13 VGS = 10V, See Fig. 6 and 13 --- VDD = 250V --- ID = 5.0A ns --- RG = 15 --- RD = 50,See Fig. 10 --- VGS = 0V --- VDS = 25V --- pF = 1.0MHz, See Fig. 5 --- VGS = 0V, V DS = 1.0V, = 1.0MHz --- VGS = 0V, VDS = 400V, = 1.0MHz --- VGS = 0V, VDS = 0V to 400V
Diode Characteristics
IS
ISM
VSD trr Qrr ton Notes:
Parameter Continuous Source Current (Body Diode) Pulsed Source Current (Body Diode) Diode Forward Voltage Reverse Recovery Time Reverse RecoveryCharge Forward Turn-On Time
Min. Typ. Max. Units
Conditions D MOSFET symbol --- --- 5.0 showing the A G integral reverse --- --- 20 S p-n junction diode. --- --- 1.5 V TJ = 25C, IS = 5.0A, VGS = 0V --- 410 620 ns TJ = 25C, I F = 5.0A --- 1.4 2.1 C di/dt = 100A/s Intrinsic turn-on time is negligible (turn-on is dominated by LS+LD)
Repetitive rating; pulse width limited by
max. junction temperature. ( See fig. 11 )
Pulse width 300s; duty cycle 2%. Coss eff. is a fixed capacitance that gives the same charging time
as Coss while VDS is rising from 0 to 80% VDSS .
Starting TJ = 25C, L = 11mH
RG = 25, IAS = 5.0A. (See Figure 12)
ISD 5.0A, di/dt 320A/s, VDD V(BR)DSS,
TJ 150C.
2
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IRFR430A/IRFU430A
100
VGS 15V 10V 8.0V 7.0V 6.0V 5.5V 5.0V BOTTOM 4.5V TOP
100
ID , Drain-to-Source Current (A)
10
ID , Drain-to-Source Current (A)
10
1
VGS 15V 10V 8.0V 7.0V 6.0V 5.5V 5.0V BOTTOM 4.5V TOP
1
0.1
4.5V
0.1
4.5V
0.01
20s PULSE WIDTH Tj = 25C
0.001 0.1 1 10 100 0.01 0.1 1
20s PULSE WIDTH Tj = 150C
10 100
VDS , Drain-to-Source Voltage (V)
VDS , Drain-to-Source Voltage (V)
Fig 1. Typical Output Characteristics
Fig 2. Typical Output Characteristics
100.00
3.0
I D = 5.0A
ID , Drain-to-Source Current ( )
2.5
10.00
RDS(on) , Drain-to-Source On Resistance
T J = 150C
2.0
1.00
(Normalized)
1.5
0.10
T J = 25C VDS = 100V 20s PULSE WIDTH
4.0 6.0 8.0 10.0 12.0 14.0 16.0
1.0
0.5
0.01
0.0 -60 -40 -20 0 20 40 60 80
V GS = 10V
100 120 140 160
VGS, Gate-to-Source Voltage (V)
TJ , Junction Temperature
( C)
Fig 3. Typical Transfer Characteristics
Fig 4. Normalized On-Resistance Vs. Temperature
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3
IRFR430A/IRFU430A
10000
12
VGS = 0V, f = 1 MHZ Ciss = C + Cgd , C gs ds SHORTED Crss = C gd Coss = C + Cgd ds
VGS , Gate-to-Source Voltage (V)
I D = 5.0A
10
VDS = 400V VDS = 250V VDS = 100V
1000
C, Capacitance(pF)
Ciss
7
100
Coss
5
10
Crss
1 1 10 100 1000
2
0 0 4 8 12 16 20
VDS , Drain-to-Source Voltage (V)
QG , Total Gate Charge (nC)
Fig 5. Typical Capacitance Vs. Drain-to-Source Voltage
Fig 6. Typical Gate Charge Vs. Gate-to-Source Voltage
100
100 OPERATION IN THIS AREA LIMITED BY RDS(on)
ID, Drain-to-Source Current (A)
I SD , Reverse Drain Current (A)
10
10
100sec 1 1msec Tc = 25C Tj = 150C Single Pulse 10 100
TJ = 150
C 1
T = 25 C J
0.1 0.2 0.5 0.8
V GS= 0 V
1.1 1.4
10msec 1000 10000
0.1
V SD,Source-to-Drain Voltage (V)
VDS , Drain-toSource Voltage (V)
Fig 7. Typical Source-Drain Diode Forward Voltage
Fig 8. Maximum Safe Operating Area
4
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IRFR430A/IRFU430A
5.5
VDS
4.4
RD
VGS RG
D.U.T.
+
-VDD
I D , Drain Current (A)
3.3
10V
Pulse Width 1 s Duty Factor 0.1 %
2.2
Fig 10a. Switching Time Test Circuit
1.1
VDS 90%
0.0 25 50 75 100 125 150
TC , Case Temperature
( C)
10% VGS
td(on) tr t d(off) tf
Fig 9. Maximum Drain Current Vs. Case Temperature
Fig 10b. Switching Time Waveforms
10
(Z thJC )
1 D = 0.50
Thermal Response
0.20 0.10 0.1 0.05 0.02 0.01
SINGLE PULSE (THERMAL RESPONSE) 0.0001 0.001 0.01
0.01 0.00001
Notes: 1. Duty factor D = 2. Peak T
J
P DM t1 t2 +TC
t1/ t 2
= P DM x Z thJC 0.1
1
t 1, Rectangular Pulse Duration (sec)
Fig 11. Maximum Effective Transient Thermal Impedance, Junction-to-Case
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5
IRFR430A/IRFU430A
250 1 5V
VDS
L
D R IV E R EAS , Single Pulse Avalanche Energy (mJ)
200
ID TOP 2.2A 3.2A 5.0A BOTTOM
RG
20V tp
D .U .T
IA S
+ V - DD
150
A
0 .0 1
100
Fig 12a. Unclamped Inductive Test Circuit
V (B R )D SS tp
50
0 25 50 75 100 125 150
Starting Tj, Junction Temperature
( C)
IAS
Fig 12b. Unclamped Inductive Waveforms
QG
Fig 12c. Maximum Avalanche Energy Vs. Drain Current
10 V
QGS VG QGD
VGS(th) Gate threshold Voltage (V)
5.0
4.5
Charge
4.0
ID = 250A
Fig 13a. Basic Gate Charge Waveform
Current Regulator Same Type as D.U.T.
3.5
50K 12V .2F .3F
3.0
D.U.T. VGS
3mA
+ V - DS
2.5 -75 -50 -25 0 25 50 75 100 125 150
T J , Temperature ( C )
IG ID
Current Sampling Resistors
Fig 14. Threshold Voltage Vs. Temperature
Fig 13b. Gate Charge Test Circuit
6
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IRFR430A/IRFU430A
Peak Diode Recovery dv/dt Test Circuit
D.U.T
+
+
Circuit Layout Considerations * Low Stray Inductance * Ground Plane * Low Leakage Inductance Current Transformer
-
+
RG * * * * dv/dt controlled by RG Driver same type as D.U.T. ISD controlled by Duty Factor "D" D.U.T. - Device Under Test
+ VDD
Driver Gate Drive P.W. Period D=
P.W. Period VGS=10V
*
D.U.T. ISD Waveform Reverse Recovery Current Body Diode Forward Current di/dt D.U.T. VDS Waveform Diode Recovery dv/dt
VDD
Re-Applied Voltage Inductor Curent
Body Diode
Forward Drop
Ripple 5%
ISD
* VGS = 5V for Logic Level Devices Fig 14. For N-Channel HEXFET Power MOSFETs
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7
IRFR430A/IRFU430A
D-Pak (TO-252AA) Package Outline
Dimensions are shown in millimeters (inches)
6 .7 3 (.2 6 5 ) 6 .3 5 (.2 5 0 ) -A5 .4 6 (.2 1 5 ) 5 .2 1 (.2 0 5 ) 4 1 .2 7 (.0 5 0 ) 0 .8 8 (.0 3 5 )
2 .3 8 (.0 9 4 ) 2 .1 9 (.0 8 6 )
1 .1 4 (.0 4 5 ) 0 .8 9 (.0 3 5 ) 0 .5 8 (.0 2 3 ) 0 .4 6 (.0 1 8 )
6 .4 5 (.2 4 5 ) 5 .6 8 (.2 2 4 ) 6 .2 2 (.2 4 5 ) 5 .9 7 (.2 3 5 ) 1.0 2 (.0 4 0 ) 1.6 4 (.0 2 5 ) 1 2 3 0 .5 1 (.0 2 0 ) M IN . 1 0 .4 2 (.4 1 0 ) 9 .4 0 (.3 7 0 )
L E A D A S S IG N M E N T S 1 - GATE 2 - D R A IN 3 - S OU R CE 4 - D R A IN
-B 1 .5 2 (.0 6 0 ) 1 .1 5 (.0 4 5 ) 3X 2X 1 .1 4 (.0 4 5 ) 0 .7 6 (.0 3 0 ) 2 .2 8 ( .0 9 0 ) 4 .5 7 ( .1 8 0 ) 0 .8 9 (.0 3 5 ) 0 .6 4 (.0 2 5 ) 0 .2 5 ( .0 1 0 ) M AMB N O TE S :
0 .5 8 (.0 2 3 ) 0 .4 6 (.0 1 8 )
1 D IM E N S IO N IN G & T O L E R A N C IN G P E R A N S I Y 1 4 .5 M , 1 9 8 2 . 2 C O N T R O L L IN G D IM E N S IO N : IN C H . 3 C O N F O R M S T O J E D E C O U T L IN E T O -2 5 2 A A . 4 D IM E N S IO N S S H O W N A R E B E F O R E S O L D E R D IP , S O L D E R D IP M A X. + 0 .1 6 (.0 0 6 ) .
D-Pak (TO-252AA) Part Marking Information
EXAMPLE: T HIS IS AN IRFR120 WITH ASSEMBLY LOT CODE 1234 ASSEMBLED ON WW 16, 1999 IN T HE AS SEMBLY LINE "A" PART NUMBER INT ERNAT IONAL RECT IFIER LOGO
IRFU120 916A 12 34
ASSEMBLY LOT CODE
DAT E CODE YEAR 9 = 1999 WEEK 16 LINE A
8
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IRFR430A/IRFU430A
I-Pak (TO-251AA) Package Outline
Dimensions are shown in millimeters (inches)
6 .7 3 (.26 5 ) 6 .3 5 (.25 0 ) -A 5 .4 6 (.2 1 5 ) 5 .2 1 (.2 0 5 ) 4 1 .2 7 (.0 5 0 ) 0 .8 8 (.0 3 5 )
2 .3 8 (.0 9 4 ) 2 .1 9 (.0 8 6 ) 0 .5 8 (.0 2 3 ) 0 .4 6 (.0 1 8 ) L E A D A S S IG N M E N T S 1 - G A TE 2 - D R A IN 3 - S OUR C E 4 - D R A IN
6 .4 5 (.2 4 5 ) 5 .6 8 (.2 2 4 ) 1 .5 2 (.0 6 0 ) 1 .1 5 (.0 4 5 ) 1 -B 2.2 8 (.0 9 0) 1.9 1 (.0 7 5) 9 .6 5 (.3 8 0 ) 8 .8 9 (.3 5 0 ) 2 3 6 .2 2 (.2 4 5 ) 5 .9 7 (.2 3 5 )
N O TE S : 1 D IM E N S IO N IN G & TO L E R A N C IN G P E R A N S I Y 1 4 .5 M , 19 8 2 . 2 C O N T R O L L IN G D IM E N S IO N : IN C H . 3 C O N F O R M S T O J E D E C O U TL IN E T O -2 5 2 A A . 4 D IM E N S IO N S S H O W N A R E B E F O R E S O L D E R D IP , S O L D E R D IP M A X . + 0 .1 6 (.0 0 6 ).
3X
1 .1 4 (.0 45 ) 0 .7 6 (.0 30 )
3X
0 .8 9 ( .0 3 5 ) 0 .6 4 ( .0 2 5 ) M AMB
1 .1 4 (.0 4 5 ) 0 .8 9 (.0 3 5 ) 0 .58 (.0 2 3 ) 0 .46 (.0 1 8 )
2 .2 8 (.0 9 0 ) 2X
0 .2 5 (.0 1 0 )
I-Pak (TO-251AA) Part Marking Information
EXAMPLE: T HIS IS AN IRFR120 WIT H ASSEMBLY LOT CODE 5678 ASSEMBLED ON WW 19, 1999 IN T HE ASSEMBLY LINE "A" PART NUMBER INT ERNAT IONAL RECT IFIER LOGO
IRFU120 919A 56 78
DAT E CODE YEAR 9 = 1999 WEEK 19 LINE A
ASSEMBLY LOT CODE
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9
IRFR430A/IRFU430A
D-Pak (TO-252AA) Tape & Reel Information
Dimensions are shown in millimeters (inches)
TR TRR TR L
16 .3 ( .641 ) 15 .7 ( .619 )
16 .3 ( .64 1 ) 15 .7 ( .61 9 )
12 .1 ( .4 7 6 ) 11 .9 ( .4 6 9 )
F E E D D IR E C T IO N
8.1 ( .3 18 ) 7.9 ( .3 12 )
F E E D D IR E C T IO N
NO TES : 1. C O N T R O LL IN G D IM E N S IO N : M ILL IM E T E R . 2. A LL D IM E N S IO N S A R E S H O W N IN M IL LIM E T E R S ( IN C H E S ). 3. O U T LIN E C O N F O R M S T O E IA -4 81 & E IA -54 1.
1 3 IN C H
16 mm NO TES : 1. O U T L IN E C O N F O R M S T O E IA -48 1.
Data and specifications subject to change without notice. This product has been designed and qualified for the Automotive [Q101] market. Qualification Standards can be found on IR's Web site.
IR WORLD HEADQUARTERS: 233 Kansas St., El Segundo, California 90245, USA Tel: (310) 252-7105 TAC Fax: (310) 252-7903 Visit us at www.irf.com for sales contact information.02/02
10
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